Search programme

​Use the search function to search amongst programmes at Chalmers. The programme overview and the programme syllabus relating to your studies are generally from the academic year you began your studies.

​​​

Syllabus for

Academic year
EDA321 - Theory and logic design of switching circuits
 
Owner: TKDAT
5,0 Credits (ECTS 7,5)
Grading: TH - Five, Four, Three, Not passed
Level: B
Department: 37 - COMPUTER SCIENCE AND ENGINEERING


Teaching language: Swedish

Course module   Credit distribution   Examination dates
Sp1 Sp2 Sp3 Sp4 No Sp
0105 Laboratory 2,0 c Grading: UG   2,0 c    
0205 Examination 3,0 c Grading: TH   3,0 c   13 Jan 2007 am V,  11 Apr 2007 pm V,  28 Aug 2007 am M

In programs

TTFYA ENGINEERING PHYSICS, Year 4 (elective)
TITEA SOFTWARE ENGINEERING, Year 3 (elective)
TELTA ELECTRICAL ENGINEERING, Year 3 (elective)
TELTA ELECTRICAL ENGINEERING, Year 4 (elective)
TKDAT COMPUTER SCIENCE AND ENGINEERING, Year 2 (compulsory)

Examiner:

Tekn lic  Arne Linde


Replaces

EDA320   Switching circuit theory and logic design


Eligibility:

For single subject courses within Chalmers programmes the same eligibility requirements apply, as to the programme(s) that the course is part of.

Course specific prerequisites

A preparatory course in Fundamentals of digital systems and computers (e.g. EDA215, EDA311, EDA432, EDA451) or similar.

Aim

The course is intended to give fundamental knowledge about analysis, synthesis and optimisation of combinatorial and sequential digital networks. The course also presents the technologies used for implementing such networks. As part of the course, the student will be introduced to a modern computer-based design tool (CAD).

Goal

After completing the course, the student should be able to
- design a medium-sized digital system
- choose a suitable technology for implementing a digital system
- master the problem of hazard and synchronization in digital systems
- understand som of the underlying algorithms in a modern computer-based design tool (CAD)

Content

Combinational networks:
- Boolean algebra, axiomatic presentation and fundamental theorems.
- Boolean forms and functions. Switching functions.
- Karnaugh map representation and simplification of Boolean functions.
- Algorithms for optimization of single and multiple output combinational logic.
- Realizations of combinational logic. Static and dynamic hazards. Multilevel logic, iterative networks. Logic design with decoders, multiplexers and programmable logic devices.

Sequential networks:
- Synchronous networks. Fundamental concepts, formal definition, Mealy and Moore networks.
- State assignment methods. Algorithms for state minimization of completely specified networks.
- Design of iterative combinational networks using sequential network techniques.
- Asynchronous networks. Fundamental concepts. Cycles and races. Race-free state assignments. Essential hazards. State minimization.

-Design for test
-Components and technologies
-HDL for synthesis

Organisation

Lectures, exercises and labs.

Literature

-

Examination

Written exam; passed laborations.


Page manager Published: Thu 03 Nov 2022.