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Syllabus for

Academic year
TDA955 - Hardware description and verification
 
Owner: DCMAS
4,0 Credits (ECTS 6)
Grading: TH - Five, Four, Three, Not passed
Level: A
Department: 0701 - Datavetenskap DI CTH/GU


Teaching language: English

Course module   Credit distribution   Examination dates
Sp1 Sp2 Sp3 Sp4 No Sp
0198 Examination 4,0 c Grading: TH   4,0 c   27 May 2004 am V,  Contact examiner

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TELTA ELECTRICAL ENGINEERING, Year 4 (elective)

Examiner:




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Eligibility:

For single subject courses within Chalmers programmes the same eligibility requirements apply, as to the programme(s) that the course is part of.

Course specific prerequisites

N/A

Aim

The aim of the course is to give a flavour of some industrially applied methods for description and verification of hardware, as well as some of the research in the area. The course consists of lectures, demonstrations, laborations and homework. In this course a greater emphasis will be placed on you working independently than you may be used to.

Content

What is a hardware description langauge? How is it different from an ordinary programming language? The standard hardware description language VHDL. How should circuit properties be specified? The standard formal specification language Sugar. Semi-formal verification via automatic
generation of testbenches from Sugar properties. Formal verification via model checking. Binary decision diagrams and their use in reachability analysis and model checking. Another approach: using a functional language for hardware description. Formal verification via synchronous observers.

Literature

Peter J. Ashenden, The Designer's Guide to VHDL. Second Edition 2001.

Examination

Two take-home exams and a final written exam. All labs must be passed. Grades U, 3, 4, 5.


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