Syllabus for |
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| DAT116 - Mixed-signal system design |
| Konstruktion av mixed-signal-system |
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| Syllabus adopted 2016-02-10 by Head of Programme (or corresponding) |
| Owner: MPEES |
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7,5 Credits
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| Grading: TH - Five, Four, Three, Fail |
| Education cycle: Second-cycle |
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Major subject: Computer Science and Engineering, Electrical Engineering
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Department: 37 - COMPUTER SCIENCE AND ENGINEERING
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In case of selection, students on MPEES: EMBEDDED ELECTRONIC SYSTEM DESIGN, MSC PROGR (course owned program) have priority
Teaching language: English
Application code: 15115
Open for exchange students: Yes
Block schedule:
C+
Minimum participants: 10
Maximum participants: 42
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Credit distribution |
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Examination dates |
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Sp1 |
Sp2 |
Sp3 |
Sp4 |
Summer course |
No Sp |
| 0111 |
Laboratory |
7,5 c |
Grading: TH |
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7,5 c
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In programs
MPSYS SYSTEMS, CONTROL AND MECHATRONICS, MSC PROGR, Year 2 (elective)
MPEES EMBEDDED ELECTRONIC SYSTEM DESIGN, MSC PROGR, Year 1 (compulsory elective)
MPEES EMBEDDED ELECTRONIC SYSTEM DESIGN, MSC PROGR, Year 2 (elective)
MPCOM COMMUNICATION ENGINEERING, MSC PROGR, Year 2 (compulsory elective)
Examiner:
Lars Svensson
Go to Course Homepage
Replaces
DAT115
Data conversion techniques
Eligibility:
In order to be eligible for a second cycle course the applicant needs to fulfil the general and specific entry requirements of the programme that owns the course. (If the second cycle course is owned by a first cycle programme, second cycle entry requirements apply.)
Exemption from the eligibility requirement:
Applicants enrolled in a programme at Chalmers where the course is included in the study programme are exempted from fulfilling these requirements.
Course specific prerequisites
DAT091/DAT092/DAT093 Introduction to electronic system design or SSY130 Applied signal processing.
Aim
The course is intended to give the student insight into how analog and mixed-mode subsystems (particularly A/D and D/A converters and surrounding circuitry) are specified and implemented, and how they affect the performance of the systems they are part of.
Learning outcomes (after completion of the course the student should be able to)
After passing the course, the student will be able to assess requirements for a mixed-signal subsystem to propose a top-level design, taking into account fundamental limitations as well as cost limitations, and verify the design through simulation.
Specifically, the student will be able to:
- Select sample rates and converter resolutions which make the required system performance attainable.
- Estimate the influence of the converter imperfections on converter and system performance.
- Identify requirements on analog interface components for a given converter solution.
- Starting from technology and component specifications, assess achievable cost and performance of analog subsystems, based on examples and calculations.
- Model a mixed-signal subsystem using software tools in order to verify assumptions and hand calculations.
Content
The course is intended to give insight into how mixed-signal subsystems, including A/D and D/A converters, are specified and implemented; and how they affect the performance of the system of which they are part. The course includes sections on sampling and quantization; converter specification; some commonly used converter architectures; analog interface components such as filters; influence of converter imperfections on system performance; and cost limits for given parameters.
Organisation
The course mainly comprises lectures and lab exercises, with supporting problem-solving sessions. Lectures introduce material from textbook and research papers. Lab exercises are based on software simulations of mixed-signal subsystems.
Literature
The main text is Maloberti: "Data converters", Springer 2008; the book is also available as an E-book in the library. Supplementary research articles and other texts are made available via the course homepage.
Examination including compulsory elements
Lab series with report submission, oral exam, voluntary sit-down exam. Final grade is a weighted sum of these.