Syllabus for |
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| EDA321 - Theory and logic design of switching circuits |
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| Syllabus adopted 2008-02-20 by Head of Programme (or corresponding) |
| Owner: TKDAT |
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7,5 Credits |
| Grading: TH - Five, Four, Three, Not passed |
| Education cycle: First-cycle |
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Major subject: Computer Science and Engineering
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Department: 37 - COMPUTER SCIENCE AND ENGINEERING
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Teaching language: Swedish
| Course module |
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Credit distribution |
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Examination dates |
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Sp1 |
Sp2 |
Sp3 |
Sp4 |
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No Sp |
| 0105 |
Laboratory |
3,0 c |
Grading: UG |
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3,0 c
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| 0205 |
Examination |
4,5 c |
Grading: TH |
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4,5 c
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13 Mar 2009 am M, |
10 Jan 2009 am V, |
25 Aug 2009 am V |
In programs
TKDAT COMPUTER SCIENCE AND ENGINEERING, Year 2 (compulsory)
TKITE SOFTWARE ENGINEERING, Year 3 (elective)
TKELT ELECTRICAL ENGINEERING, Year 3 (elective)
Examiner:
Tekn lic
Arne Linde
Replaces
EDA320
Switching circuit theory and logic design
Course evaluation:
http://document.chalmers.se/doc/149117762
Eligibility:
For single subject courses within Chalmers programmes the same eligibility requirements apply, as to the programme(s) that the course is part of.
Course specific prerequisites
A preparatory course in Fundamentals of digital systems and computers (
e.g. EDA215,
EDA432,
EDA451) or similar.
Aim
The course is intended to give fundamental knowledge about analysis, synthesis and optimisation of combinatorial and sequential digital networks. The course also presents the technologies used for implementing such networks. As part of the course, the student will be introduced to a modern computer-based design tool (CAD).
Learning outcomes (after completion of the course the student should be able to)
- design a medium-sized digital system
- choose a suitable technology for implementing a digital system
- master the problem of hazard and synchronization in digital systems
- understand som of the underlying algorithms in a modern computer-based design tool (CAD)
Content
Combinational networks:
- Boolean algebra, axiomatic presentation and fundamental theorems.
- Boolean forms and functions. Switching functions.
- Karnaugh map representation and simplification of Boolean functions.
- Algorithms for optimization of single and multiple output combinational logic.
- Realizations of combinational logic. Static and dynamic hazards. Multilevel logic, iterative networks. Logic design with decoders, multiplexers and programmable logic devices.
Sequential networks:
- Synchronous networks. Fundamental concepts, formal definition, Mealy and Moore networks.
- State assignment methods. Algorithms for state minimization of completely specified networks.
- Design of iterative combinational networks using sequential network techniques.
- Asynchronous networks. Fundamental concepts. Cycles and races. Race-free state assignments. Essential hazards. State minimization.
-Design for test
-Components and technologies
-HDL for synthesis
Organisation
Lectures, exercises and labs.
Literature
S. Brown, Z. Vranesic,
Fundamentals of Digital Logic with VHDL Design, Second Edition
ISBN 007-124482-4
Examination
Written exam; passed laborations.